LCPC 2014

The 27th International Workshop on
Languages and Compilers for Parallel Computing

September 15-17, 2014
Intel Corporation, Hillsboro, OR

Collocated with CnC-2014


Monday, September 15, 2014
Room: JF1-Pres

9:00 AM - Session 1

Compilers I

  • Re-engineering Compiler Transformations To Outperform Database Query Optimizers

    Kristian Rietveld and Harry Wijshoff

  • Automatic Parallelism through Macro Dataflow in MATLAB

    Pushkar Ratnalikar and Arun Chauhan

  • π Abstraction: Parallelism-Aware Array Data Flow Analysis for OpenMP

    Fahed Jubair, Rudolf Eigenmann, Samuel Midkiff and Okwan Kwon

  • Automatic Streamization of Image Processing Applications

    Pierre Guillou, Fabien Coelho and François Irigoin

11:00 AM - Break

11:15 AM - Session 2


  • LightPlay: Efficient Replay with GPUs

    Min Feng, Farzad Khorasani, Rajiv Gupta and Laxmi Bhuyan

  • Systematic Debugging of Concurrent Systems Using Coalesced Stack Trace Graphs

    Diego Caminha B de Oliveira, Alan Humphrey, Qingyu Meng, Zvonimir Rakamaric, Martin Berzins and Ganesh Gopalakrishnan

12:15 PM - Lunch

1:30PM - Keynote

Keynote: Vanquishing SIMD Hurdles: Look Back and Look Forward [Slides]

  • SIMD Vectorization has received significant attention in the past decade as an important method to accelerate scientific applications, media and embedded applications on SIMD architectures such as Intel SSE, AVX, IBM AltiVec and ARM Neon. However, two fundamental SIMD hurdles – control flow divergence and data access divergence exist still. In this talk, we take a brief look back what happened in the past three and half decades, and what progress we have made on the path of vanquishing SIMD hurdles for exploiting effective SIMD parallelism in real large applications in the past few years at Intel. We share Intel’s vision on explicit SIMD programming model and compiler technology evolution for vanquishing SIMD vectorization hurdles.

    Xinmin Tian, Intel Corporation

2:30PM - Break

2:45PM - Session 3

Compilers II

  • Static Approximation of MPI Communication Graphs for Optimized Process Placement

    Andrew J. McPherson, Vijay Nagarajan and Marcelo Cintra

  • Change Detection based Parallelism Mapping: Exploiting Offline Models and Online Adaptation

    Murali Krishna Emani and Michael O'Boyle

  • Memory Management Techniques for Exploiting RDMA in PGAS Languages

    Barnaby Dalton, Ilie Tanase, Michail Alvanos, George Almasi and Ettore Tiotto

  • Evaluation of Automatic Power Reduction by OSCAR Compiler on Intel Haswell and ARM Cortex-A9 Multicores

    Tomohiro Hirano, Hideo Yamamoto, Shuhei Iizuka, Kohei Muto, Takashi Goto, Tamami Wake, Hiroki Mikami, Moriyuki Takamura, Keiji Kimura and Hironori Kasahara

5:45 PM - Excursion

Dinner Cruise

The Bus will depart from the Larkspur Landing hotel.

Tuesday, September 16, 2014
Room: JFCC-117

9:00 AM - Session 4


  • Unification of Static and Dynamic Analyses to Enable Vectorization

    Ashay Rane, Rakesh Krishnaiyer, Chris Newburn, James Browne, Leo Fialho and Zakhar Matveev

  • Exploring and Evaluating Array Layout Restructuration for SIMDization

    Christopher Haine, Olivier Aumage and Denis Barthou

  • Efficient Exploitation of Hyper Loop Parallelism in Vectorization

    Shixiong Xu and David Gregg

10:30 AM - Break

11:00AM - Session 5

Directive-based Accelerator Programming

  • Evaluating Performance Portability of OpenACC

    Amit Sabne, Putt Sakdhnagool, Seyong Lee and Jeffrey Vetter

  • Directive-Based Compilers for GPUs

    Swapnil Ghike, Ruben Gran Tejero, Maria Garzaran and David Padua

  • NAS Parallel Benchmarks for GPGPUs using a Directive-based Programming Model

    Rengan Xu, Xiaonan Tian, Sunita Chandrasekaran, Yonghong Yan and Barbara Chapman

12:30 PM - Lunch

1:45 PM - Keynote

Keynote: Compiler Research - Are We Done Yet? [Slides]

  • David Padua, University of Illinois at Urbana-Champaign

2:45 PM - Break

3:00 PM - Session 6

Algorithms I

  • Simultaneous inspection: Hiding the overhead of inspector-executor style dynamic parallelization

    Daniel Brinkers, Michael Philippsen and Ronald Veldema

  • An Approach for Proving the Correctness of Inspector/Executor Transformations

    Michael Norrish and Michelle Strout

  • Fast Automatic Heuristic Construction Using Active Learning

    William Ogilvie, Pavlos Petoumenos, Zheng Wang and Hugh Leather

Wednesday, September 17, 2014
Room: JFCC-117

9:00 AM - Session 7

Algorithms II

  • Tiled Linear Algebra: A System for Parallel Graph Algorithms

    Saeed Maleki, G. Carl Evans and David Padua

  • STAPL Skeleton Framework

    Mani Zandifar, Nathan Thomas, Nancy Amato and Lawrence Rauchwerger

  • Jagged Tiling for Intra-tile Parallelism and Fine-Grain Multithreading

    Sunil Shrestha, Joseph Manzano, Andres Marquez, John Feo and Guang Gao

10:30 AM - Break

11:00 AM - Session 8


  • Optimistic Parallelism on GPUs

    Min Feng, Rajiv Gupta and Laxmi Bhuyan

  • Understanding Co-Run Degradations on Integrated Heterogeneous Processors

    Qi Zhu, Bo Wu, Xipeng Shen, Li Shen and Zhiying Wang

  • GLES: A Practical GPGPU Optimizing Compiler Using Data Sharing and Thread Coarsening

    Zhen Lin, Bo Jiang, Han Wan and Xiaopeng Gao

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